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Showing results 1 to 30 of 57

Issue DateTitleAuthor(s)
2014-06A 1.5-5.0 Gb/s clock and data recovery circuit with dual-PFD phase-rotating phase locked loop유창식
2014-06A 100-kS/s 8.3-ENOB 1.7-mu W Time-Domain Analog-to-Digital Converter유창식
2019-04A 12-Gb/s continuous-time linear equalizer with offset canceller유창식
2018-07A 12-Gb/s HDMI 2.1 quarter-rate transmitter in 28-nm bulk CMOS process유창식
2011-11A 20-MHz Bandwidth Continuous-Time Sigma-Delta Modulator With Jitter Immunity Improved Full Clock Period SCR (FSCR) DAC and High-Speed DWA유창식
2011-07A 2x2 MIMO Tri-Band Dual-Mode Direct-Conversion CMOS Transceiver for Worldwide WiMAX/WLAN Applications유창식
2012-11A 3.0-W Wireless Power Receiver Circuit with 75-% Overall Efficiency유창식
2015-08A 40-W Flyback Converter with Dual-Operation Modes for Improved Light Load Efficiency유창식
2015-06A 5.25-V-tolerant bidirectional I/O circuit in a 28-nm CMOS process유창식
2013-08A 6-Gb/s Differential Voltage Mode Driver with Independent Control of Output Impedance and Pre-Emphasis Level유창식
2015-10A 6-Gbps dual-mode digital clock and data recovery circuit in a 65-nm CMOS technology유창식
2015-04A 6-Gbps/lane receiver for a clock-forwarded link in 65-nm CMOS process유창식
2013-06A 6.0-W Bi-Directional DC-DC Converter for Wireless Power Transceiver in 0.35-μm BCDMOS유창식
2011-02Active Power Factor Correction (PFC) Circuit With Resistor-Free Zero-Current Detection유창식
2015-08An analog sigma-delta modulator with shared operational amplifier for low-power class-D audio amplifier유창식
2013-06An automatic load-adaptive switching frequency selection technique for improving the light-load efficiency of a buck converter유창식
2014-02A CCM/DCM Dual-Mode Synchronous Rectification Controller for a High-Efficiency Flyback Converter유창식
2013-10A Class-D Amplifier for a Digital Hearing Aid with 0.015% Total Harmonic Distortion Plus Noise유창식
2013-02A Class-D Amplifier With Pulse Code Modulated (PCM) Digital Input for Digital Hearing Aid유창식
2018-11Continuous-time linear equalizer with automatic boosting gain adaptation and input offset cancellation유창식
2018-08A Continuous-time Sigma-delta Modulator with Clock Jitter Tolerant Self-resetting Return-to-zero Feedback DAC유창식
2015-09Crosstalk cancelling voltage-mode driver for multi-Gbps parallel DRAM interface유창식
2018-10A Current-Mode Boost Converter with Wide Bandwidth Inductor Current Sensor유창식
2014-05Data and edge decision feedback equalizer with ˃ 1.0-UI timing margin for both data and edge samples유창식
2011-07dB-선형적 특성을 가진 GPS 수신기를 위한 CMOS 가변 이득 증폭기유창식
2014-12Digital Phase Locked Loop (DPLL) with Offset Dithered Bang-Bang Phase Detector (BBPD) for Bandwidth Control유창식
2017-07Duty-cycle and phase spacing error correction circuit for high-speed serial link유창식
2018-09A f(REF)/5 Bandwidth Type-II Charge-Pump Phase-Locked Loop With Dual-Edge Phase Comparison and Sampling Loop Filter유창식
2014-03A fast automatic frequency calibration technique for a 2-6 GHz frequency synthesizer유창식
2018-08A HDMI-to-MHL Video Format Conversion System-on-Chip (SoC) for Mobile Applications유창식

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