| 2011-02 | Active Power Factor Correction (PFC) Circuit With Resistor-Free Zero-Current Detection | 유창식 |
| 2015-08 | An analog sigma-delta modulator with shared operational amplifier for low-power class-D audio amplifier | 유창식 |
| 2013-06 | An automatic load-adaptive switching frequency selection technique for improving the light-load efficiency of a buck converter | 유창식 |
| 2014-02 | A CCM/DCM Dual-Mode Synchronous Rectification Controller for a High-Efficiency Flyback Converter | 유창식 |
| 2013-10 | A Class-D Amplifier for a Digital Hearing Aid with 0.015% Total Harmonic Distortion Plus Noise | 유창식 |
| 2013-02 | A Class-D Amplifier With Pulse Code Modulated (PCM) Digital Input for Digital Hearing Aid | 유창식 |
| 2018-11 | Continuous-time linear equalizer with automatic boosting gain adaptation and input offset cancellation | 유창식 |
| 2018-08 | A Continuous-time Sigma-delta Modulator with Clock Jitter Tolerant Self-resetting Return-to-zero Feedback DAC | 유창식 |
| 2015-09 | Crosstalk cancelling voltage-mode driver for multi-Gbps parallel DRAM interface | 유창식 |
| 2018-10 | A Current-Mode Boost Converter with Wide Bandwidth Inductor Current Sensor | 유창식 |
| 2019-11 | A Current-Mode Hysteretic Buck Converter With Multiple-Reset RC-Based Inductor Current Sensor | 유창식 |
| 2014-05 | Data and edge decision feedback equalizer with ˃ 1.0-UI timing margin for both data and edge samples | 유창식 |
| 2011-07 | dB-선형적 특성을 가진 GPS 수신기를 위한 CMOS 가변 이득 증폭기 | 유창식 |
| 2014-12 | Digital Phase Locked Loop (DPLL) with Offset Dithered Bang-Bang Phase Detector (BBPD) for Bandwidth Control | 유창식 |
| 2017-07 | Duty-cycle and phase spacing error correction circuit for high-speed serial link | 유창식 |
| 2018-09 | A f(REF)/5 Bandwidth Type-II Charge-Pump Phase-Locked Loop With Dual-Edge Phase Comparison and Sampling Loop Filter | 유창식 |
| 2014-03 | A fast automatic frequency calibration technique for a 2-6 GHz frequency synthesizer | 유창식 |
| 2018-08 | A HDMI-to-MHL Video Format Conversion System-on-Chip (SoC) for Mobile Applications | 유창식 |
| 2016-01 | A HDMI-to-MHL video format conversion system-on-chip (SoC) for mobile handset in a 130-nm CMOS technology | 유창식 |
| 2012-08 | High Efficient Power Receiver IC with Load Modulator for Wireless Resonant Power Transfer | 유창식 |
| 2014-01 | Intra-panel interface with clock-embedded differential signalling for large size digital television | 유창식 |
| 2012-01 | Load-Independent Current Control Technique of a Single-Inductor Multiple-Output Switching DC-DC converter | 유창식 |
| 2012-09 | Low Drop-Out (LDO) Voltage Regulator with Improved Power Supply Rejection | 유창식 |
| 2014-12 | Macro-Model of Magnetic Tunnel Junction for STT-MRAM including Dynamic Behavior | 유창식 |
| 2012-11 | Measurement of Intersymbol Interference Jitter by Fractional Oversampling for Adaptive Equalization | 유창식 |
| 2015-09 | A Multiphase Synchronous Buck Converter With a Fully Integrated Current Balancing Scheme | 유창식 |
| 2018-02 | A Non-Volatile Ternary Content-Addressable Memory Cell for Low-Power and Variation-Toleration Operation | 유창식 |
| 2018-10 | A Programmable Logic-in-memory (LiM) based on Magnetic Tunneling Junction (MTJ) | 유창식 |
| 2016-06 | Quasi-Resonant (QR) Controller With Adaptive Switching Frequency Reduction Scheme for Flyback Converter | 유창식 |
| 2017-04 | A simultaneously bidirectional inductively coupled link in a 0.13-mu m CMOS technology | 유창식 |
